CST STUDIO SUITE發佈更新版本2021 SP5
General / Environment
- Improved stability of the save operation of protected projects.
- Improved stability of the schematic related to 1D plotting.
- Enhanced loft operation of multiple picked faces between two bodies.
- Opening and closing a combo box without selecting an item no longer prevents the block parameters to be shown.
- Improved speed of loading sequences in Parametric Sweep dialog box.
- Fixed determination of PCB content when updating after check for update.
System Assembly and Modeling (SAM)
- Improved stability when running coupled simulations using DSLS licensing.
EDA Import / EDA Tools
- Added PCB import parameter 'bending buffer distance'. New Feature!
- CST Bio Models Extension 4.1 is now available for download from the Knowledge Base. New Feature!
- 5G Post-Processing Wizard: Fixed power flow density calculation, for some solvers imaginary part was included.
- In Save Video show error message if invalid character '%' is used in output file path.
- Fixed broken 2D/3D Plot screenshot creation from Report Tool and Export Imag
Tetrahedral (Tet) Mesh
- Avoid hang for a very special periodic configuration.
CST Microwave Studio - General
- Fixed farfield calculation issues for AMD CPUs with AVX2 instruction set.
- Prevented optimizer goals from disappearing on rebuild failures.
CST Microwave Studio - Transient Solver (TLM Mesh)
- Improved PML stability for single-precision solver runs.
- Fixed missing stop criteria convergence plots when linear prediction is active.
CST Microwave Studio - Frequency Domain Solver (Tetrahedral Mesh)
- Consider the non-linearity between the static B and H fields when applying the Green Sandy model to partially magnetized ferrites.
- Fixed abnormal termination when materials with inhomogeneous conductivity were in use.
CST Microwave Studio - Integral Equation Solver
- Fixed an issue with the thickness of thin-panel.
- Fixed wrong field plot.
- Fixed NFS monitor size if symmetries are set.
CST EM Studio - Partial RLC Solver
- Fixed of missing R/L after second solver run if broadband and automatic node pair creation activated.
CST PCB Studio
- Align PSpice export type with user interface selection.
- Consider intermediate nets between cascading VRMs in IRDrop.
- Fixed losing Decap setup/analysis data upon closing the Decap Tool tab.
CST Design Studio - General
- Improved stability of selecting and deleting TOUCHSTONE blocks.
- CST MWS ports do not show up in the block center, if "Routing Optimal" distribution is used.
- Copy&Paste of blocks in the navigation tree does not lock up Ribbon buttons anymore.
- Made execution of AC combine tasks in simulation projects with FD-TET more robust.
- Prevented potential abnormal termination in result normalization to Gaussian reference signal.
- Fixed issue in the definition of RLC load in terminate port functionality.
- Fixed issue in data/model reference name in data/model compare user interface.